MCQ Practice Question
In two’s-complement signed arithmetic, adding two positive n-bit numbers produces an overflow when?
Correct Answer: A. The result has sign bit 1 even though both operands have sign bit 0
Explanation: Signed overflow occurs when operands with the same sign produce a result with the opposite sign. For two positive operands, a negative-sign result indicates overflow.
Reference: Standard digital electronics: two's-complement overflow