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JTO MCQs

Practice JTO-oriented Electronics & Telecommunication Engineering MCQs with answers and explanations for technical exam preparation. Questions are arranged in pages of up to 100.

Question 2
Signals & SystemsSampling

According to the sampling theorem, a band-limited signal should be sampled at a rate of at least?

  • AHalf the highest signal frequency
  • BEqual to the highest signal frequency
  • CTwice the highest signal frequency
  • DFour times the lowest signal frequency
Report an error
Correct Answer: C. Twice the highest signal frequency
Explanation: For ideal reconstruction, the sampling frequency must be at least twice the highest frequency component of the band-limited signal.
Reference: Nyquist sampling theorem
Question 4
Digital ElectronicsCounters

A synchronous counter differs from a ripple counter because in a synchronous counter?

  • AOnly the first flip-flop receives the clock
  • BAll flip-flops are clocked simultaneously
  • CNo flip-flop requires a clock
  • DThe output is always asynchronous
Report an error
Correct Answer: B. All flip-flops are clocked simultaneously
Explanation: In a synchronous counter, the same clock is applied to all flip-flops, so state changes occur together rather than rippling stage by stage.
Reference: Standard digital electronics: synchronous counters
Question 7
Digital ElectronicsCounters

A decade counter is also known as a?

  • AMOD-2 counter
  • BMOD-8 counter
  • CMOD-10 counter
  • DMOD-16 counter
Report an error
Correct Answer: C. MOD-10 counter
Explanation: A decade counter cycles through ten states, so it is a MOD-10 counter.
Reference: Standard digital electronics: decade counters
Question 8
Digital ElectronicsCounters

In a ripple counter, the propagation delay generally?

  • AIs independent of the number of stages
  • BAccumulates through successive flip-flop stages
  • CBecomes exactly zero
  • DOccurs only in the first stage
Report an error
Correct Answer: B. Accumulates through successive flip-flop stages
Explanation: Ripple counters are asynchronous; each stage is triggered by the preceding stage, so propagation delays accumulate.
Reference: Standard digital electronics: asynchronous counters
Question 9
Digital ElectronicsShift Registers

A shift register is primarily used to?

  • AAmplify analog voltage
  • BStore and shift binary data
  • CGenerate sinusoidal signals
  • DMeasure resistance
Report an error
Correct Answer: B. Store and shift binary data
Explanation: A shift register is a group of flip-flops used to store binary information and shift it from one stage to another.
Reference: Standard digital electronics: shift registers
Question 10
Digital ElectronicsLogic Families

Compared with classic TTL, CMOS logic is especially known for low?

  • AInput impedance
  • BStatic power consumption
  • CNoise margin
  • DFan-out in every case
Report an error
Correct Answer: B. Static power consumption
Explanation: A major advantage of CMOS logic is very low static power consumption, particularly when not switching.
Reference: Standard digital electronics: CMOS characteristics
Question 12
Digital ElectronicsLogic Families

Fan-out of a logic gate refers to?

  • AThe number of outputs inside the gate
  • BThe maximum number of standard logic inputs its output can drive reliably
  • CThe propagation delay through the gate
  • DThe number of power-supply pins
Report an error
Correct Answer: B. The maximum number of standard logic inputs its output can drive reliably
Explanation: Fan-out specifies how many compatible logic inputs one gate output can drive while maintaining valid logic levels.
Reference: Standard digital electronics: fan-out
Question 13
Digital ElectronicsCounters

A ring counter is commonly formed by?

  • AConnecting the complemented output permanently to ground
  • BFeeding the last flip-flop output back to the first flip-flop input
  • CRemoving the clock from every flip-flop
  • DConnecting all outputs directly together
Report an error
Correct Answer: B. Feeding the last flip-flop output back to the first flip-flop input
Explanation: A basic ring counter is a shift register in which the output of the last stage is fed back to the input of the first stage.
Reference: Standard digital electronics: ring counters
Question 14
Digital ElectronicsTiming & Clock

Propagation delay of a digital gate is the time between?

  • AApplying power and permanently damaging the gate
  • BAn input transition and the corresponding output transition
  • CTwo unrelated clock cycles only
  • DWriting and erasing ROM
Report an error
Correct Answer: B. An input transition and the corresponding output transition
Explanation: Propagation delay is the finite time from a relevant change at a gate input to the resulting change at its output.
Reference: Standard digital electronics: propagation delay
Question 15
Digital ElectronicsCounters

A Johnson counter is also called a?

  • AStraight ring counter
  • BTwisted-ring counter
  • CBinary adder
  • DPriority encoder
Report an error
Correct Answer: B. Twisted-ring counter
Explanation: A Johnson counter feeds the complemented output of the last stage back to the first stage and is commonly called a twisted-ring counter.
Reference: Standard digital electronics: Johnson counters
Question 17
Digital ElectronicsMemory

Which memory is volatile?

  • AROM
  • BEEPROM
  • CRAM
  • DFlash memory
Report an error
Correct Answer: C. RAM
Explanation: RAM is volatile because its stored data is normally lost when power is removed.
Reference: Standard digital electronics: semiconductor memory
Question 19
Digital ElectronicsMemory

SRAM stores each bit using primarily?

  • AA capacitor that must be periodically refreshed
  • BA bistable latch/flip-flop-like cell
  • CA magnetic tape element
  • DAn optical sensor
Report an error
Correct Answer: B. A bistable latch/flip-flop-like cell
Explanation: SRAM uses bistable circuitry for each stored bit and does not require periodic refresh while powered.
Reference: Standard digital electronics: SRAM
Question 20
Digital ElectronicsMemory

DRAM requires periodic refresh mainly because each bit is stored as?

  • ACharge on a capacitor
  • BA permanent fuse state
  • CA mechanical switch position
  • DA magnetic core only
Report an error
Correct Answer: A. Charge on a capacitor
Explanation: DRAM cells store information as electrical charge on capacitors, and leakage requires periodic refreshing.
Reference: Standard digital electronics: DRAM
Question 21
Digital ElectronicsMemory

EEPROM can be erased and reprogrammed?

  • AOnly by ultraviolet light
  • BElectrically
  • COnly by replacing the chip
  • DOnly while manufacturing
Report an error
Correct Answer: B. Electrically
Explanation: EEPROM stands for electrically erasable programmable read-only memory and can be erased and programmed electrically.
Reference: Standard digital electronics: EEPROM
Question 22
Digital ElectronicsADC & DAC

An ADC performs which conversion?

  • ADigital to analog
  • BAnalog to digital
  • CFrequency to resistance only
  • DBinary to decimal display only
Report an error
Correct Answer: B. Analog to digital
Explanation: An analog-to-digital converter converts an analog input quantity into a digital representation.
Reference: Standard digital electronics: ADC
Question 23
Digital ElectronicsADC & DAC

A DAC performs which conversion?

  • AAnalog to digital
  • BDigital to analog
  • CAC to DC power conversion
  • DSerial to parallel only
Report an error
Correct Answer: B. Digital to analog
Explanation: A digital-to-analog converter converts a digital code into a corresponding analog output.
Reference: Standard digital electronics: DAC
Question 25
Digital ElectronicsADC & DAC

Increasing the number of bits of an ideal ADC generally?

  • AReduces the number of available codes
  • BImproves resolution
  • CEliminates the need for sampling
  • DMakes the output analog
Report an error
Correct Answer: B. Improves resolution
Explanation: More bits provide more quantization levels, allowing smaller input changes to be represented and therefore improving resolution.
Reference: Standard digital electronics: ADC resolution
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Question 26
Digital ElectronicsLogic Families

TTL is an abbreviation for?

  • ATransistor-Transistor Logic
  • BTransfer-Timing Logic
  • CTri-state Transfer Logic
  • DTransistor-Tuned Line
Report an error
Correct Answer: A. Transistor-Transistor Logic
Explanation: TTL stands for Transistor-Transistor Logic, a family of digital integrated circuits based on bipolar junction transistors.
Reference: Standard digital electronics: TTL
Question 27
Digital ElectronicsLogic Families

CMOS is an abbreviation for?

  • AComplementary Metal-Oxide-Semiconductor
  • BCommon Mode Output System
  • CControlled Memory Output Switch
  • DComplementary Magnetic Output Stage
Report an error
Correct Answer: A. Complementary Metal-Oxide-Semiconductor
Explanation: CMOS stands for Complementary Metal-Oxide-Semiconductor.
Reference: Standard digital electronics: CMOS
Question 28
Digital ElectronicsFlip-Flops

For a JK flip-flop, if J = 1 and K = 1, the next state is?

  • AAlways 0
  • BAlways 1
  • CThe complement of the present state
  • DEqual to the present state
Report an error
Correct Answer: C. The complement of the present state
Explanation: With J = K = 1, a JK flip-flop toggles, so Q(next) is the complement of Q(present).
Reference: Standard digital electronics: JK flip-flop characteristic
Question 31
Digital ElectronicsFlip-Flops

The race-around condition in a level-triggered JK flip-flop can occur when?

  • AJ = K = 0
  • BJ = 0, K = 1
  • CJ = K = 1 and the clock pulse is sufficiently wide
  • DJ = 1, K = 0 only
Report an error
Correct Answer: C. J = K = 1 and the clock pulse is sufficiently wide
Explanation: When J = K = 1, repeated toggling can occur during a sufficiently long active clock level if the propagation delay permits multiple changes.
Reference: Standard digital electronics: race-around condition
Question 32
Digital ElectronicsFlip-Flops

A common method of avoiding race-around in a JK flip-flop is to use?

  • AA master-slave or edge-triggered flip-flop
  • BA larger supply voltage only
  • CAn OR gate at the output
  • DA resistor in series with every input
Report an error
Correct Answer: A. A master-slave or edge-triggered flip-flop
Explanation: Master-slave or edge-triggered operation restricts the effective state transition and prevents repeated toggling during one clock interval.
Reference: Standard digital electronics: JK flip-flops
Question 44
Digital ElectronicsBoolean Algebra

Simplify the Boolean expression A + A·B.

  • AA
  • BB
  • CA + B
  • DA·B
Report an error
Correct Answer: A. A
Explanation: By the absorption law, A + AB = A.
Reference: Standard digital electronics: Boolean absorption law
Question 45
Digital ElectronicsBoolean Algebra

Simplify the Boolean expression A(A + B).

  • AA
  • BB
  • CA + B
  • DAB
Report an error
Correct Answer: A. A
Explanation: By the absorption law, A(A + B) = A.
Reference: Standard digital electronics: Boolean absorption law
Question 46
Digital ElectronicsBoolean Algebra

According to De Morgan’s theorem, the complement of (A + B) is?

  • AA complement + B complement
  • BA complement · B complement
  • CA · B
  • DA + B
Report an error
Correct Answer: B. A complement · B complement
Explanation: De Morgan's theorem gives complement(A + B) = complement(A) · complement(B).
Reference: Standard digital electronics: De Morgan's theorem
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Question 55
Digital ElectronicsEncoders & Decoders

A priority encoder differs from an ordinary encoder because it?

  • AHas no outputs
  • BAssigns priority when more than one input is active
  • CAlways converts analog signals
  • DStores the encoded data permanently
Report an error
Correct Answer: B. Assigns priority when more than one input is active
Explanation: A priority encoder resolves simultaneous active inputs by producing the code corresponding to the highest-priority asserted input.
Reference: Standard digital electronics: priority encoders
Question 58
Digital ElectronicsMultiplexers & Demultiplexers

An 8-to-1 multiplexer can directly implement a Boolean function of three variables by connecting the variables primarily to its?

  • AData outputs
  • BSelect inputs
  • CPower pins
  • DEnable output only
Report an error
Correct Answer: B. Select inputs
Explanation: Three variables provide 2^3 = 8 combinations, so they can drive the three select inputs while the data inputs are set according to the function truth table.
Reference: Standard digital electronics: implementing logic with multiplexers
Question 60
Digital ElectronicsCombinational Circuits

For a full adder, the carry-out expression can be written as?

  • AA XOR B XOR Cin
  • BAB + ACin + BCin
  • CA + B + Cin
  • DABCin only
Report an error
Correct Answer: B. AB + ACin + BCin
Explanation: The full-adder carry is 1 whenever at least two of the three inputs are 1, giving Cout = AB + ACin + BCin.
Reference: Standard digital electronics: full adder
Question 61
Digital ElectronicsNumber Systems & Codes

The binary result of adding 1011 and 0101 is?

  • A10000
  • B01110
  • C11110
  • D10100
Report an error
Correct Answer: A. 10000
Explanation: Binary 1011 is 11 and 0101 is 5. Their sum is 16, which is binary 10000.
Reference: Standard digital electronics: binary arithmetic
Question 62
Digital ElectronicsTiming & Clock

For an edge-triggered D flip-flop, the input D must remain stable for specified intervals immediately before and after the active clock edge. These intervals are called?

  • ARise time and fall time
  • BSetup time and hold time
  • CPropagation time and recovery time
  • DAccess time and cycle time
Report an error
Correct Answer: B. Setup time and hold time
Explanation: Setup time is the minimum interval D must be stable before the active clock edge, while hold time is the minimum interval it must remain stable afterward.
Reference: Standard digital electronics: flip-flop timing
Question 63
Digital ElectronicsTiming & Clock

If a flip-flop’s setup or hold time requirement is violated, the device may enter?

  • ASaturation only
  • BMetastability
  • CPermanent tri-state operation
  • DFrequency multiplication
Report an error
Correct Answer: B. Metastability
Explanation: Violating setup or hold requirements can leave a flip-flop temporarily in an indeterminate or metastable state before it resolves to a valid logic level.
Reference: Standard digital electronics: metastability
Question 67
Digital ElectronicsADC & DAC

Which ADC architecture is generally known for very high conversion speed because it uses many comparators in parallel?

  • ADual-slope ADC
  • BFlash ADC
  • CSuccessive-approximation ADC
  • DIntegrating ADC only
Report an error
Correct Answer: B. Flash ADC
Explanation: A flash ADC compares the input simultaneously against many reference levels, providing very fast conversion at the cost of many comparators.
Reference: Standard digital electronics: ADC architectures
Question 68
Digital ElectronicsADC & DAC

A successive-approximation ADC determines the digital output primarily by?

  • ATesting bits through a binary-search-like sequence
  • BCounting indefinitely until power is removed
  • CUsing only one fixed comparator threshold with no DAC
  • DDirectly storing the analog voltage as binary charge
Report an error
Correct Answer: A. Testing bits through a binary-search-like sequence
Explanation: A SAR ADC successively tests candidate bits, effectively performing a binary search using an internal DAC and comparator.
Reference: Standard digital electronics: SAR ADC
Question 71
Digital ElectronicsNumber Systems & Codes

The Gray-code equivalent of binary 1011 is?

  • A1110
  • B1010
  • C1101
  • D1001
Report an error
Correct Answer: A. 1110
Explanation: For binary-to-Gray conversion, the MSB is unchanged and each following Gray bit is the XOR of adjacent binary bits: 1, 1 XOR 0 = 1, 0 XOR 1 = 1, 1 XOR 1 = 0, giving 1110.
Reference: Standard digital electronics: Gray code conversion
Question 75
Digital ElectronicsMemory

A 4K × 8 memory has a total capacity of?

  • A4 Kbits
  • B8 Kbits
  • C32 Kbits
  • D64 Kbits
Report an error
Correct Answer: C. 32 Kbits
Explanation: There are 4096 words of 8 bits each, giving 4096 × 8 = 32768 bits = 32 Kbits.
Reference: Standard digital electronics: memory capacity
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Question 77
Electronic Devices & CircuitsSemiconductor Fundamentals

Doping pure silicon with a pentavalent impurity such as phosphorus generally produces?

  • AP-type semiconductor
  • BN-type semiconductor
  • CIntrinsic semiconductor
  • DInsulating material
Report an error
Correct Answer: B. N-type semiconductor
Explanation: Pentavalent donor atoms contribute extra electrons, making electrons the majority carriers in an n-type semiconductor.
Reference: Standard semiconductor electronics: doping
Question 78
Electronic Devices & CircuitsSemiconductor Fundamentals

In a p-type semiconductor, the majority charge carriers are?

  • AElectrons
  • BHoles
  • CNeutrons
  • DPositive ions moving through the lattice
Report an error
Correct Answer: B. Holes
Explanation: Trivalent acceptor doping creates holes as the majority mobile carriers in p-type material.
Reference: Standard semiconductor electronics: p-type material
Question 79
Electronic Devices & CircuitsPN Junction Diode

The depletion region of a PN junction mainly contains?

  • AOnly freely moving electrons
  • BOnly freely moving holes
  • CImmobile ionized donor and acceptor atoms
  • DNo electric field
Report an error
Correct Answer: C. Immobile ionized donor and acceptor atoms
Explanation: Carrier diffusion near the junction leaves uncovered fixed ionized donors and acceptors, forming the space-charge or depletion region.
Reference: Standard semiconductor electronics: PN junction
Question 80
Electronic Devices & CircuitsPN Junction Diode

Forward biasing a PN junction generally causes the depletion width to?

  • AIncrease
  • BDecrease
  • CRemain exactly unchanged
  • DBecome infinite
Report an error
Correct Answer: B. Decrease
Explanation: Forward bias opposes the built-in junction field, reducing the barrier potential and narrowing the depletion region.
Reference: Standard semiconductor electronics: diode biasing
Question 81
Electronic Devices & CircuitsPN Junction Diode

The approximate forward voltage drop of a conducting silicon diode at ordinary current levels is commonly taken as?

  • A0.1 V
  • B0.3 V
  • C0.7 V
  • D5 V
Report an error
Correct Answer: C. 0.7 V
Explanation: For basic circuit analysis, a forward-biased silicon PN diode is commonly approximated as having about a 0.7 V drop, although the actual value depends on current and temperature.
Reference: Standard electronics: silicon diode approximation
Question 82
Electronic Devices & CircuitsSpecial Diodes

A Zener diode is normally operated for voltage regulation in its?

  • AForward cut-off region
  • BReverse breakdown region
  • CZero-current region only
  • DForward saturation region
Report an error
Correct Answer: B. Reverse breakdown region
Explanation: A Zener diode is designed to operate safely in reverse breakdown, where its voltage remains approximately constant over a useful current range.
Reference: Standard electronics: Zener diode
Question 83
Electronic Devices & CircuitsSpecial Diodes

A photodiode used as a light detector is commonly operated under?

  • AReverse bias
  • BHeavy forward bias only
  • CZero voltage in every application
  • DAvalanche breakdown necessarily
Report an error
Correct Answer: A. Reverse bias
Explanation: Photodiodes are commonly reverse biased so incident light produces a measurable photocurrent with useful response speed and sensitivity.
Reference: Standard optoelectronics: photodiode
Question 84
Electronic Devices & CircuitsSpecial Diodes

An LED emits light primarily because of?

  • ACarrier recombination in a forward-biased junction
  • BReverse-bias leakage only
  • CThermal breakdown of the junction
  • DMechanical vibration of the package
Report an error
Correct Answer: A. Carrier recombination in a forward-biased junction
Explanation: In an LED, injected electrons and holes recombine in the semiconductor and release energy as photons.
Reference: Standard optoelectronics: LED
Question 91
Electronic Devices & CircuitsBJT Amplifiers

A common-emitter amplifier normally produces an output voltage that is approximately how far out of phase with the input voltage?

  • A0 degrees
  • B90 degrees
  • C180 degrees
  • D360 degrees only
Report an error
Correct Answer: C. 180 degrees
Explanation: A common-emitter voltage amplifier is inverting, so its output voltage is approximately 180 degrees out of phase with its input.
Reference: Standard analog electronics: common-emitter amplifier
Question 92
Electronic Devices & CircuitsBJT Amplifiers

Which BJT configuration typically has high voltage gain, high current gain, and a 180-degree phase reversal?

  • ACommon base
  • BCommon emitter
  • CCommon collector
  • DEmitter follower with unity current gain
Report an error
Correct Answer: B. Common emitter
Explanation: The common-emitter configuration provides both voltage and current gain and introduces phase inversion, making it widely used for amplification.
Reference: Standard analog electronics: transistor configurations
Question 93
Electronic Devices & CircuitsBJT Amplifiers

The common-collector BJT configuration is also called an?

  • AEmitter follower
  • BCollector follower
  • CBase follower
  • DDifferential pair
Report an error
Correct Answer: A. Emitter follower
Explanation: In a common-collector stage, the output is taken from the emitter, which approximately follows the input voltage; hence the name emitter follower.
Reference: Standard analog electronics: emitter follower
Question 94
Electronic Devices & CircuitsFET & MOSFET

A major characteristic of an ideal FET input is?

  • AVery low input impedance
  • BVery high input impedance
  • CZero output resistance in all configurations
  • DLarge gate current under normal operation
Report an error
Correct Answer: B. Very high input impedance
Explanation: A FET is voltage controlled and normally draws very little gate current, giving it high input impedance.
Reference: Standard electronics: FET characteristics
Question 95
Electronic Devices & CircuitsFET & MOSFET

For an n-channel JFET operating normally, the gate-source junction is generally?

  • AForward biased heavily
  • BReverse biased
  • CShort-circuited
  • DDriven into avalanche continuously
Report an error
Correct Answer: B. Reverse biased
Explanation: The JFET gate-channel PN junction is normally reverse biased, which keeps gate current very small and controls the channel depletion width.
Reference: Standard electronics: JFET operation
Question 96
Electronic Devices & CircuitsFET & MOSFET

An enhancement-mode n-channel MOSFET at VGS = 0 ideally has?

  • AA fully enhanced conducting channel
  • BNo induced conducting channel between drain and source
  • CMaximum drain current
  • DA forward-biased gate junction
Report an error
Correct Answer: B. No induced conducting channel between drain and source
Explanation: An enhancement-mode nMOS requires a positive gate-to-source voltage above threshold to induce a conducting channel; ideally it is off at VGS = 0.
Reference: Standard electronics: enhancement MOSFET
Question 99
Electronic Devices & CircuitsOperational Amplifiers

For an ideal op-amp operating with negative feedback in its linear region, the differential input voltage V+ – V- is approximately?

  • AInfinite
  • BEqual to the supply voltage
  • CZero
  • DAlways 1 V
Report an error
Correct Answer: C. Zero
Explanation: Because an ideal op-amp has infinite open-loop gain, linear negative-feedback operation forces its two input voltages to be approximately equal, often called a virtual short.
Reference: Standard analog electronics: ideal op-amp assumptions
Question 100
Electronic Devices & CircuitsRectifiers & Filters

A capacitor filter connected across a rectifier load primarily reduces ripple by?

  • ACharging near voltage peaks and discharging through the load between peaks
  • BBlocking all DC current
  • CIncreasing the supply frequency
  • DMaking the diode permanently reverse biased
Report an error
Correct Answer: A. Charging near voltage peaks and discharging through the load between peaks
Explanation: The capacitor charges when the rectified voltage rises and supplies load current while the rectified input falls, smoothing the output voltage.
Reference: Standard electronics: capacitor filter
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