ETC EngineeringMCQs
Home › Digital Electronics › A memory chip is organized as 2K × 16. How many data input/output lines are required to transfer one complete word in parallel?
MCQ Practice Question
Digital ElectronicsMemory

A memory chip is organized as 2K × 16. How many data input/output lines are required to transfer one complete word in parallel?

  • A2
  • B11
  • C16
  • D32
Report an error
Correct Answer: C. 16
Explanation: The organization 2K × 16 means 2048 addressable words, each 16 bits wide. Therefore 16 data lines are required for a parallel word transfer.
Reference: Standard digital electronics: memory organization
Continue practicing: Digital Electronics MCQs or browse all MCQs.