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Digital ElectronicsSequential Timing

A hold-time check in a synchronous register path is primarily concerned with which path characteristic?

  • AMinimum or contamination delay
  • BMaximum combinational delay only
  • CAverage propagation delay only
  • DPower-supply frequency
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Correct Answer: A. Minimum or contamination delay
Explanation: Hold analysis checks that new data cannot reach the destination flip-flop too soon after the active clock edge, so minimum path delay is critical.
Reference: Standard digital electronics: hold-time analysis
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