MCQ Practice Question
A 4-bit ripple counter uses flip-flops having 20 ns propagation delay each. Approximately what worst-case ripple settling delay can occur through all four stages?
Correct Answer: C. 80 ns
Explanation: For a simple ripple counter, worst-case delay approximately accumulates across stages: 4 × 20 ns = 80 ns.
Reference: Standard digital electronics: ripple counter propagation delay
