MCQ Practice Question

A 4-bit ring counter is initialized to 0001 and shifts the single 1 cyclically once per clock. After three clock pulses, assuming left cyclic shifts, its state is?

  • A0010
  • B0100
  • C1000
  • D0001
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Correct Answer: C. 1000
Explanation: Starting with 0001, successive left cyclic shifts give 0010, 0100, and then 1000 after three clock pulses.
Reference: Standard digital electronics: ring counter
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