Counters MCQs

Explanation: In a synchronous counter, the same clock is applied to all flip-flops, so state changes occur together rather than rippling stage by stage.

Explanation: An n-bit binary counter has 2^n states. For n = 4, the number of states is 16.

Explanation: The modulus (MOD number) of a counter is the number of distinct states in its counting sequence.

Explanation: A decade counter cycles through ten states, so it is a MOD-10 counter.

Explanation: Ripple counters are asynchronous; each stage is triggered by the preceding stage, so propagation delays accumulate.

Explanation: A basic ring counter is a shift register in which the output of the last stage is fed back to the input of the first stage.

Explanation: A Johnson counter feeds the complemented output of the last stage back to the first stage and is commonly called a twisted-ring counter.

Explanation: An n-stage Johnson counter normally has 2n distinct states.

Explanation: A 5-bit counter has 32 states, 0 through 31. After 11111, the next pulse causes rollover to 00000.

Explanation: Each toggle stage divides frequency by 2. Three stages divide by 2^3 = 8, so 8 MHz / 8 = 1 MHz.

Explanation: Choose the smallest n for which 2^n is at least 12. Since 2^3 = 8 and 2^4 = 16, four flip-flops are required.

Explanation: The smallest n satisfying 2^n >= 100 is 7 because 2^6 = 64 and 2^7 = 128.

Explanation: In a 4-bit binary counter, the MSB frequency is the input clock divided by 2^4. Thus 16 MHz / 16 = 1 MHz.

Explanation: The smallest n satisfying 2^n >= 60 is 6 because 2^5 = 32 and 2^6 = 64.

Explanation: A basic n-stage one-hot ring counter has n distinct states, so a 4-stage ring counter has four states.

Explanation: An n-stage Johnson counter normally has 2n states. Therefore a 5-stage Johnson counter has 10 states.

Explanation: Starting with 0001, successive left cyclic shifts give 0010, 0100, and then 1000 after three clock pulses.

Explanation: A Johnson or twisted-ring counter feeds the complemented last-stage output back to the first stage and normally produces 2n distinct states.

Explanation: A standard n-stage Johnson counter has 2n states, so five stages provide 10 distinct states.

Explanation: In a synchronous counter, all flip-flops receive the clock together and combinational logic determines which stages toggle. This avoids cumulative ripple clocking between stages.

Explanation: 0111 is decimal 7. Incrementing by one gives decimal 8, represented by 1000 in four-bit binary.

Explanation: Four flip-flops can represent 16 binary states. A MOD-10 sequence uses 10 of them, leaving 16−10=6 unused states.

Explanation: A self-starting counter has next-state logic that directs unused states back into the valid sequence, preventing permanent lockout.