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Browse Electronics & Telecommunication Engineering MCQs with four options, hidden answers, concise explanations and references where available. Questions are organized in pages of up to 100 for focused practice.

Question 701
Control SystemsState Space

A continuous-time state-space system x_dot=Ax is asymptotically stable if all eigenvalues of A have?

  • AStrictly negative real parts
  • BStrictly positive real parts
  • CZero real parts only
  • DMagnitude greater than one
Report an error
Correct Answer: A. Strictly negative real parts
Explanation: For a finite-dimensional continuous-time LTI system, asymptotic stability requires all eigenvalues of A to lie strictly in the left half-plane.
Reference: Standard control systems: state space
Question 704
Control SystemsState Space

The observability matrix for an n-state system begins as?

  • A[C; CA; CA²; ...; CA^(n-1)]
  • B[B; AB; A²B; ...]
  • C[A; B; C]
  • D[D; CD] only
Report an error
Correct Answer: A. [C; CA; CA²; ...; CA^(n-1)]
Explanation: The standard observability matrix is formed by stacking C, CA, CA², ..., CA^(n-1).
Reference: Standard control systems: state space
Question 706
Control SystemsState Space

For the state matrix A=diag(-2,-5), the system poles are?

  • A2 and 5
  • B-2 and -5
  • C-7 and 10
  • D0 and -10
Report an error
Correct Answer: B. -2 and -5
Explanation: The eigenvalues of a diagonal matrix are its diagonal entries, so the poles are -2 and -5.
Reference: Standard control systems: state space
Question 708
Microprocessors & MicrocontrollersFundamentals

A microprocessor is primarily a?

  • ACPU implemented on an integrated circuit
  • BComplete power supply
  • CMechanical switching device
  • DMemory-only device
Report an error
Correct Answer: A. CPU implemented on an integrated circuit
Explanation: A microprocessor integrates the central processing unit functions on an IC and normally requires external memory and peripherals.
Reference: Standard microprocessors and microcontrollers: fundamentals
Question 709
Microprocessors & MicrocontrollersFundamentals

A microcontroller typically integrates which elements on a single chip?

  • ACPU, memory and peripheral interfaces
  • BOnly an ALU
  • COnly RAM
  • DOnly a clock generator
Report an error
Correct Answer: A. CPU, memory and peripheral interfaces
Explanation: A microcontroller commonly combines CPU, program/data memory and peripherals such as I/O ports and timers on one chip.
Reference: Standard microprocessors and microcontrollers: fundamentals
Question 710
Microprocessors & MicrocontrollersCPU Architecture

The ALU in a processor is mainly responsible for?

  • AArithmetic and logical operations
  • BLong-term program storage only
  • CGenerating AC power
  • DMechanical input switching
Report an error
Correct Answer: A. Arithmetic and logical operations
Explanation: The arithmetic logic unit performs operations such as addition, subtraction, AND, OR and comparisons.
Reference: Standard microprocessors and microcontrollers: cpu architecture
Question 711
Microprocessors & MicrocontrollersCPU Architecture

The program counter normally contains?

  • AAddress of the next instruction to be fetched
  • BCurrent arithmetic result
  • CStack data only
  • DPower-supply voltage
Report an error
Correct Answer: A. Address of the next instruction to be fetched
Explanation: The program counter tracks the address from which the next instruction is to be fetched.
Reference: Standard microprocessors and microcontrollers: cpu architecture
Question 712
Microprocessors & MicrocontrollersCPU Architecture

The stack pointer is used to?

  • APoint to the current top of the stack
  • BStore every opcode permanently
  • CGenerate clock frequency
  • DCount address lines
Report an error
Correct Answer: A. Point to the current top of the stack
Explanation: The stack pointer holds an address associated with the top of the processor's stack.
Reference: Standard microprocessors and microcontrollers: cpu architecture
Question 713
Microprocessors & MicrocontrollersCPU Architecture

A processor register is generally?

  • AA small high-speed storage location inside the CPU
  • BAn external hard disk
  • CA mechanical relay
  • DA power amplifier
Report an error
Correct Answer: A. A small high-speed storage location inside the CPU
Explanation: Registers are fast storage locations within the processor used for operands, addresses and intermediate results.
Reference: Standard microprocessors and microcontrollers: cpu architecture
Question 714
Microprocessors & MicrocontrollersCPU Architecture

The accumulator in many classic microprocessors is mainly used to?

  • AHold operands and arithmetic/logic results
  • BStore the entire operating system
  • CGenerate address-bus timing only
  • DReplace ROM permanently
Report an error
Correct Answer: A. Hold operands and arithmetic/logic results
Explanation: The accumulator is a central register used by many arithmetic and logic instructions.
Reference: Standard microprocessors and microcontrollers: cpu architecture
Question 715
Microprocessors & MicrocontrollersBus Organization

The address bus is normally used to carry?

  • AAddresses of memory or I/O locations
  • BOnly arithmetic results
  • CClock pulses only
  • DPower to peripherals
Report an error
Correct Answer: A. Addresses of memory or I/O locations
Explanation: The address bus identifies the memory or I/O location involved in a transfer.
Reference: Standard microprocessors and microcontrollers: bus organization
Question 716
Microprocessors & MicrocontrollersBus Organization

The data bus carries?

  • AData between processor, memory and peripherals
  • BOnly addresses
  • COnly reset signals
  • DOnly interrupt priorities
Report an error
Correct Answer: A. Data between processor, memory and peripherals
Explanation: The data bus transfers instruction bytes and data among system components.
Reference: Standard microprocessors and microcontrollers: bus organization
Question 719
Microprocessors & Microcontrollers8085 Basics

The 8085 is fundamentally an?

  • A8-bit microprocessor
  • B16-bit microcontroller
  • C32-bit DSP only
  • D4-bit memory chip
Report an error
Correct Answer: A. 8-bit microprocessor
Explanation: The Intel 8085 is classified as an 8-bit microprocessor because its main data operations and data bus are 8 bits wide.
Reference: Standard microprocessors and microcontrollers: 8085 basics
Question 720
Microprocessors & Microcontrollers8085 Basics

The 8085 has an address bus of?

  • A8 bits
  • B12 bits
  • C16 bits
  • D20 bits
Report an error
Correct Answer: C. 16 bits
Explanation: The 8085 provides 16 address lines, allowing 2^16 addressable byte locations.
Reference: Standard microprocessors and microcontrollers: 8085 basics
Question 722
Microprocessors & Microcontrollers8085 Basics

The 8085 data bus width is?

  • A4 bits
  • B8 bits
  • C16 bits
  • D20 bits
Report an error
Correct Answer: B. 8 bits
Explanation: The 8085 has an 8-bit bidirectional data bus.
Reference: Standard microprocessors and microcontrollers: 8085 basics
Question 724
Microprocessors & Microcontrollers8085 Registers

In the 8085, the accumulator is an?

  • A8-bit register
  • B16-bit register
  • C20-bit register
  • D1-bit register
Report an error
Correct Answer: A. 8-bit register
Explanation: The 8085 accumulator A is an 8-bit register used extensively by arithmetic and logic instructions.
Reference: Standard microprocessors and microcontrollers: 8085 registers
Question 725
Microprocessors & Microcontrollers8085 Flags

Which of the following is an 8085 flag?

  • AZero flag
  • BDMA flag
  • CUSB flag
  • DEthernet flag
Report an error
Correct Answer: A. Zero flag
Explanation: The 8085 flag register includes Sign, Zero, Auxiliary Carry, Parity and Carry flags.
Reference: Standard microprocessors and microcontrollers: 8085 flags
Question 727
Microprocessors & Microcontrollers8085 Flags

The Carry flag in the 8085 is particularly used to indicate?

  • ACarry out or borrow condition associated with arithmetic
  • BInstruction address only
  • CClock failure
  • DMemory refresh only
Report an error
Correct Answer: A. Carry out or borrow condition associated with arithmetic
Explanation: The Carry flag records carry/borrow information from arithmetic operations and is also affected by certain rotate operations.
Reference: Standard microprocessors and microcontrollers: 8085 flags
Question 728
Microprocessors & Microcontrollers8085 Instructions

The instruction MOV B,C in the 8085 performs what operation?

  • ACopies contents of C into B
  • BCopies B into C
  • CAdds B and C
  • DClears both B and C
Report an error
Correct Answer: A. Copies contents of C into B
Explanation: The 8085 MOV destination,source format copies the source operand into the destination, so B receives C.
Reference: Standard microprocessors and microcontrollers: 8085 instructions
Question 731
Microprocessors & Microcontrollers8085 Instructions

The 8085 JMP instruction is used for?

  • AUnconditional transfer of program control to a specified address
  • BAddition of two registers
  • CLoading immediate data into the accumulator
  • DReturning from a subroutine
Report an error
Correct Answer: A. Unconditional transfer of program control to a specified address
Explanation: JMP address loads the program counter with the specified target address without testing a condition.
Reference: Standard microprocessors and microcontrollers: 8085 instructions
Question 732
Microprocessors & Microcontrollers8085 Instructions

The 8085 CALL instruction is primarily used to?

  • AInvoke a subroutine while saving the return address
  • BClear all registers
  • CDisable the clock
  • DPerform multiplication directly
Report an error
Correct Answer: A. Invoke a subroutine while saving the return address
Explanation: CALL transfers control to a subroutine and saves the return address on the stack so execution can later resume after a RET.
Reference: Standard microprocessors and microcontrollers: 8085 instructions
Question 733
Microprocessors & Microcontrollers8085 Addressing Modes

Which 8085 addressing mode is used in the instruction MVI A,32H?

  • AImmediate addressing
  • BRegister addressing
  • CDirect addressing
  • DRegister indirect addressing
Report an error
Correct Answer: A. Immediate addressing
Explanation: The operand 32H is included directly in the instruction, so MVI A,32H uses immediate addressing.
Reference: Standard microprocessors and microcontrollers: 8085 addressing modes
Question 734
Microprocessors & Microcontrollers8085 Addressing Modes

Which addressing mode is used by the 8085 instruction MOV A,B?

  • AImmediate
  • BRegister
  • CDirect
  • DRegister indirect
Report an error
Correct Answer: B. Register
Explanation: Both source and destination operands are CPU registers, so MOV A,B uses register addressing.
Reference: Standard microprocessors and microcontrollers: 8085 addressing modes
Question 735
Microprocessors & Microcontrollers8085 Addressing Modes

Which addressing mode is used by the 8085 instruction LDA 2050H?

  • ARegister
  • BImmediate
  • CDirect
  • DImplied
Report an error
Correct Answer: C. Direct
Explanation: LDA contains the 16-bit memory address of the operand explicitly, so it uses direct addressing.
Reference: Standard microprocessors and microcontrollers: 8085 addressing modes
Question 739
Microprocessors & Microcontrollers8085 Instructions

The 8085 instruction INX H performs which operation?

  • AIncrements HL pair by one
  • BIncrements only H by one
  • CAdds HL to accumulator
  • DLoads HL from memory
Report an error
Correct Answer: A. Increments HL pair by one
Explanation: INX operates on a 16-bit register pair, so INX H increments HL by one.
Reference: Standard microprocessors and microcontrollers: 8085 instructions
Question 742
Microprocessors & Microcontrollers8085 Logical Instructions

If A=3CH in the 8085, executing CMA produces?

  • AC3H
  • B3DH
  • CCCH
  • D00H
Report an error
Correct Answer: A. C3H
Explanation: CMA complements every accumulator bit. The one's complement of 3CH (00111100) is C3H (11000011).
Reference: Standard microprocessors and microcontrollers: 8085 logical instructions
Question 745
Microprocessors & Microcontrollers8085 Stack & Subroutines

Which 8085 instruction is used to return from a subroutine?

  • ACALL
  • BJMP
  • CRET
  • DRST
Report an error
Correct Answer: C. RET
Explanation: RET pops the saved return address from the stack into the program counter.
Reference: Standard microprocessors and microcontrollers: 8085 stack & subroutines
Question 746
Microprocessors & Microcontrollers8085 Stack & Subroutines

During a normal 8085 CALL instruction, the return address is stored on the?

  • AStack
  • BAccumulator
  • CFlag register only
  • DData bus permanently
Report an error
Correct Answer: A. Stack
Explanation: CALL pushes the return address onto the stack before transferring control to the subroutine.
Reference: Standard microprocessors and microcontrollers: 8085 stack & subroutines
Question 747
Microprocessors & Microcontrollers8085 Stack & Subroutines

In the 8085, the stack normally grows toward?

  • AHigher memory addresses
  • BLower memory addresses
  • COnly I/O addresses
  • DThe reset vector
Report an error
Correct Answer: B. Lower memory addresses
Explanation: PUSH/CALL operations decrement the stack pointer, so the 8085 stack grows toward lower memory addresses.
Reference: Standard microprocessors and microcontrollers: 8085 stack & subroutines
Question 749
Microprocessors & Microcontrollers8085 Interrupts

Which 8085 interrupt has the highest hardware priority?

  • AINTR
  • BRST 5.5
  • CRST 6.5
  • DTRAP
Report an error
Correct Answer: D. TRAP
Explanation: TRAP is the highest-priority hardware interrupt in the 8085.
Reference: Standard microprocessors and microcontrollers: 8085 interrupts
Question 750
Microprocessors & Microcontrollers8085 Interrupts

Which 8085 hardware interrupt is non-maskable?

  • ATRAP
  • BRST 7.5
  • CRST 6.5
  • DINTR
Report an error
Correct Answer: A. TRAP
Explanation: TRAP cannot be disabled by the normal interrupt masking mechanism and is therefore non-maskable.
Reference: Standard microprocessors and microcontrollers: 8085 interrupts
Question 752
Microprocessors & Microcontrollers8085 Interrupts

Which 8085 interrupt is non-vectored and requires external hardware to supply an instruction during interrupt acknowledge?

  • ATRAP
  • BRST 7.5
  • CRST 5.5
  • DINTR
Report an error
Correct Answer: D. INTR
Explanation: INTR is a general-purpose non-vectored interrupt; the external device must provide an instruction, commonly an RST opcode, during interrupt acknowledge.
Reference: Standard microprocessors and microcontrollers: 8085 interrupts
Question 753
Microprocessors & Microcontrollers8085 Interrupts

The 8085 instruction EI is used to?

  • AEnable maskable interrupts
  • BDisable all clock signals
  • CEnable only TRAP
  • DErase interrupt vectors
Report an error
Correct Answer: A. Enable maskable interrupts
Explanation: EI enables the maskable interrupt system after its specified activation behavior; TRAP is non-maskable.
Reference: Standard microprocessors and microcontrollers: 8085 interrupts
Question 754
Microprocessors & Microcontrollers8085 Interrupts

The 8085 instruction DI is used to?

  • ADisable maskable interrupts
  • BDisable TRAP permanently
  • CDecrease the accumulator
  • DDisable the address bus
Report an error
Correct Answer: A. Disable maskable interrupts
Explanation: DI disables maskable interrupts; it does not disable the non-maskable TRAP input.
Reference: Standard microprocessors and microcontrollers: 8085 interrupts
Question 755
Microprocessors & Microcontrollers8085 Timing

A T-state in a microprocessor corresponds to?

  • AOne period of the processor clock
  • BOne complete program
  • COne memory chip
  • DOne interrupt vector only
Report an error
Correct Answer: A. One period of the processor clock
Explanation: A T-state is one clock period and is the basic timing unit used to describe machine cycles.
Reference: Standard microprocessors and microcontrollers: 8085 timing
Question 758
Microprocessors & Microcontrollers8085 Interfacing

In the 8085, the lower-order address bus AD0-AD7 is multiplexed with the?

  • AData bus
  • BInterrupt bus
  • CClock bus
  • DPower bus
Report an error
Correct Answer: A. Data bus
Explanation: AD0-AD7 carry the low-order address during the first part of a machine cycle and data during later parts.
Reference: Standard microprocessors and microcontrollers: 8085 interfacing
Question 760
Microprocessors & Microcontrollers8085 Timing

If the 8085 READY input is low, the processor can insert?

  • AWait states
  • BExtra interrupts only
  • CReset cycles only
  • DDMA addresses only
Report an error
Correct Answer: A. Wait states
Explanation: READY allows slower memory or I/O devices to extend a bus cycle by causing the processor to insert wait states.
Reference: Standard microprocessors and microcontrollers: 8085 timing
Question 761
Microprocessors & Microcontrollers8085 Interfacing

The 8085 HOLD and HLDA signals are primarily associated with?

  • ADirect memory access
  • BSerial arithmetic
  • CSoftware interrupts
  • DBCD adjustment
Report an error
Correct Answer: A. Direct memory access
Explanation: An external DMA controller can assert HOLD; the processor responds with HLDA after relinquishing the buses.
Reference: Standard microprocessors and microcontrollers: 8085 interfacing
Question 762
Microprocessors & Microcontrollers8085 I/O Interfacing

Memory-mapped I/O in an 8085 system uses?

  • AThe memory address space and memory-type instructions
  • BOnly an 8-bit isolated port address
  • CNo address lines
  • DOnly RST instructions
Report an error
Correct Answer: A. The memory address space and memory-type instructions
Explanation: Memory-mapped I/O assigns peripheral registers addresses in the memory space, allowing memory-reference instructions to access them.
Reference: Standard microprocessors and microcontrollers: 8085 i/o interfacing
Question 763
Microprocessors & Microcontrollers8086 Architecture

The Intel 8086 is fundamentally a?

  • A16-bit microprocessor
  • B8-bit microcontroller
  • C4-bit processor
  • D32-bit DSP
Report an error
Correct Answer: A. 16-bit microprocessor
Explanation: The 8086 has a 16-bit ALU and 16-bit external data bus and is classified as a 16-bit microprocessor.
Reference: Standard microprocessors and microcontrollers: 8086 architecture
Question 767
Microprocessors & Microcontrollers8086 Architecture

The 8086 Bus Interface Unit is responsible for functions including?

  • AInstruction fetching and physical address generation
  • BOnly arithmetic multiplication
  • COnly flag comparisons
  • DOnly interrupt masking
Report an error
Correct Answer: A. Instruction fetching and physical address generation
Explanation: The BIU handles bus operations, instruction fetching, segment registers and physical-address generation.
Reference: Standard microprocessors and microcontrollers: 8086 architecture
Question 768
Microprocessors & Microcontrollers8086 Architecture

The 8086 instruction prefetch queue has a capacity of?

  • A2 bytes
  • B4 bytes
  • C6 bytes
  • D8 bytes
Report an error
Correct Answer: C. 6 bytes
Explanation: The 8086 BIU can prefetch up to six instruction bytes into its queue.
Reference: Standard microprocessors and microcontrollers: 8086 architecture
Question 772
Microprocessors & Microcontrollers8086 Segmentation

The 8086 physical address is calculated from segment and offset as?

  • ASegment × 16 + offset
  • BSegment + offset only
  • CSegment × 256 + offset
  • DOffset × 16 + segment
Report an error
Correct Answer: A. Segment × 16 + offset
Explanation: A segment value is shifted left by four bits, equivalent to multiplying by 16, and the offset is then added.
Reference: Standard microprocessors and microcontrollers: 8086 segmentation
Question 773
Microprocessors & Microcontrollers8086 Segmentation

For 8086 address 1234H:0010H, the physical address is?

  • A12340H
  • B12350H
  • C12440H
  • D01244H
Report an error
Correct Answer: B. 12350H
Explanation: 1234H×10H=12340H; adding 0010H gives 12350H.
Reference: Standard microprocessors and microcontrollers: 8086 segmentation
Question 774
Microprocessors & Microcontrollers8086 Segmentation

For 8086 address 2000H:1234H, the physical address is?

  • A21234H
  • B32340H
  • C201234H
  • D03234H
Report an error
Correct Answer: A. 21234H
Explanation: 2000H×10H=20000H; adding 1234H gives 21234H.
Reference: Standard microprocessors and microcontrollers: 8086 segmentation
Question 775
Microprocessors & Microcontrollers8086 Segmentation

The maximum size of one logical 8086 segment is?

  • A16 KB
  • B32 KB
  • C64 KB
  • D1 MB
Report an error
Correct Answer: C. 64 KB
Explanation: The 16-bit offset can range from 0000H to FFFFH, so a segment can span up to 64 KiB.
Reference: Standard microprocessors and microcontrollers: 8086 segmentation
Question 779
Microprocessors & Microcontrollers8086 Addressing Modes

The 8086 instruction MOV AX,[BX] uses which addressing concept for the memory operand?

  • ARegister indirect addressing
  • BImmediate addressing
  • CImplied addressing
  • DPort addressing only
Report an error
Correct Answer: A. Register indirect addressing
Explanation: BX contains the effective offset address of the memory operand, making this a register-indirect memory reference.
Reference: Standard microprocessors and microcontrollers: 8086 addressing modes
Question 780
Microprocessors & Microcontrollers8086 Addressing Modes

In 8086 immediate addressing, the operand is?

  • AIncluded in the instruction itself
  • BAlways stored at address 00000H
  • CAlways in the stack
  • DSupplied only by an interrupt
Report an error
Correct Answer: A. Included in the instruction itself
Explanation: An immediate operand is encoded as part of the instruction.
Reference: Standard microprocessors and microcontrollers: 8086 addressing modes
Question 783
Microprocessors & Microcontrollers8051 Architecture

The classic Intel 8051 is fundamentally an?

  • A8-bit microcontroller
  • B16-bit microprocessor
  • C32-bit DSP
  • D4-bit memory controller
Report an error
Correct Answer: A. 8-bit microcontroller
Explanation: The original 8051 is an 8-bit microcontroller with an 8-bit CPU and integrated memory/peripheral resources.
Reference: Standard microprocessors and microcontrollers: 8051 architecture
Question 787
Microprocessors & Microcontrollers8051 Interfacing

During external memory access in the 8051, Port 0 is multiplexed to carry?

  • ALow-order address and data
  • BOnly high-order address
  • COnly interrupt signals
  • DOnly serial data
Report an error
Correct Answer: A. Low-order address and data
Explanation: Port 0 serves as multiplexed AD0-AD7 for the low address byte and data bus during external-memory cycles.
Reference: Standard microprocessors and microcontrollers: 8051 interfacing
Question 788
Microprocessors & Microcontrollers8051 Interfacing

During external memory access, 8051 Port 2 commonly carries?

  • AHigh-order address byte
  • BOnly low-order data
  • CTimer overflow
  • DSerial receive data only
Report an error
Correct Answer: A. High-order address byte
Explanation: Port 2 supplies A8-A15 when the 8051 accesses external memory.
Reference: Standard microprocessors and microcontrollers: 8051 interfacing
Question 791
Microprocessors & Microcontrollers8051 Timers & Interrupts

In the 8051, the TCON register contains control/status bits associated with?

  • ATimers and external interrupts
  • BSerial baud data only
  • CProgram memory only
  • DPort 0 pull-ups only
Report an error
Correct Answer: A. Timers and external interrupts
Explanation: TCON includes timer run/overflow bits and external-interrupt control/flag bits.
Reference: Standard microprocessors and microcontrollers: 8051 timers & interrupts
Question 792
Microprocessors & Microcontrollers8051 Serial Communication

The 8051 serial port is commonly described as?

  • AFull-duplex
  • BHalf-duplex only
  • CSimplex transmit-only
  • DParallel-only
Report an error
Correct Answer: A. Full-duplex
Explanation: The 8051 serial interface can transmit and receive simultaneously, so it supports full-duplex communication.
Reference: Standard microprocessors and microcontrollers: 8051 serial communication
Question 795
Microprocessors & Microcontrollers8051 Serial Communication

In the classic 8051, the serial transmit-complete flag is?

  • ATI
  • BRI
  • CTF0
  • DIE0
Report an error
Correct Answer: A. TI
Explanation: TI is set when a serial transmission completes according to the selected serial mode.
Reference: Standard microprocessors and microcontrollers: 8051 serial communication
Question 796
Microprocessors & Microcontrollers8051 Serial Communication

In the classic 8051, the serial receive flag is?

  • ATF1
  • BRI
  • CTR0
  • DIT0
Report an error
Correct Answer: B. RI
Explanation: RI indicates that a serial data frame has been received and is ready for software handling.
Reference: Standard microprocessors and microcontrollers: 8051 serial communication
Question 797
Microprocessors & Microcontrollers8051 Interrupts

The classic 8051 provides how many standard interrupt sources?

  • A3
  • B5
  • C8
  • D16
Report an error
Correct Answer: B. 5
Explanation: The standard 8051 has five interrupt sources: external 0, Timer 0, external 1, Timer 1 and serial port.
Reference: Standard microprocessors and microcontrollers: 8051 interrupts