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Three cascaded toggle flip-flops used as a binary frequency divider receive an 8 MHz clock. The frequency at the third-stage output is?

  • A4 MHz
  • B2 MHz
  • C1 MHz
  • D500 kHz
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Correct Answer: C. 1 MHz
Explanation: Each toggle stage divides frequency by 2. Three stages divide by 2^3 = 8, so 8 MHz / 8 = 1 MHz.
Reference: Standard digital electronics: binary frequency divider
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