Operational Amplifiers MCQs

Explanation: An ideal op-amp draws zero input current; therefore its input impedance is considered infinite.

Explanation: For an ideal inverting amplifier, Av = -Rf/Rin = -100 kOhm / 10 kOhm = -10.

Explanation: For a non-inverting amplifier, Av = 1 + Rf/R1 = 1 + 90/10 = 10.

Explanation: Because an ideal op-amp has infinite open-loop gain, linear negative-feedback operation forces its two input voltages to be approximately equal, often called a virtual short.

Explanation: The ideal op-amp model assumes infinite open-loop voltage gain.

Explanation: The ideal op-amp draws no input current, implying infinite input resistance, and acts as an ideal voltage source at its output, implying zero output resistance.

Explanation: For equal input and feedback resistors, Vo = -(V1 + V2) = -(1 + 2) = -3 V.

Explanation: An ideal inverting integrator produces Vo = -(1/RC) integral(Vin dt), within its intended operating range.

Explanation: For the ideal inverting differentiator, Vo = -RC(dVin/dt), so output is proportional to the input's time derivative with inversion.

Explanation: Common-mode rejection ratio compares differential gain with common-mode gain; a high CMRR indicates strong rejection of signals common to both inputs.

Explanation: CMRR = Ad/Acm = 100000. In dB, 20 log10(100000) = 100 dB.

Explanation: Slew rate is the maximum large-signal rate at which the op-amp output voltage can change, commonly expressed in V/microsecond.

Explanation: Time = voltage change / slew rate = 10 V / (0.5 V/microsecond) = 20 microseconds.

Explanation: For a dominant-pole compensated op-amp, closed-loop gain multiplied by bandwidth is approximately constant over the usual operating range.

Explanation: For a single-pole op-amp, bandwidth ≈ GBW/closed-loop gain = 1 MHz/10 = 100 kHz.

Explanation: With no linear negative feedback, an ideal comparator drives its output toward positive saturation when the non-inverting input exceeds the inverting input.

Explanation: Hysteresis provides different thresholds for rising and falling inputs, reducing unwanted switching caused by noise near a single threshold.

Explanation: For matched ratios, Vo = (R2/R1)(V2 - V1) = 10(0.3 - 0.1) = 2 V.

Explanation: Av = -Rf/Rin = -10, so Vo = -10 × 0.25 V = -2.5 V, assuming the output remains within the supply limits.

Explanation: For a non-inverting amplifier, Av = 1 + Rf/R1. Thus 6 = 1 + Rf/10 kOhm, giving Rf = 50 kOhm.

Explanation: fmax = SR/(2πVp) = 10^6 V/s /(2π×10 V) ≈ 15.9 kHz.

Explanation: 80 dB means Ad/Acm = 10^(80/20) = 10000. Therefore Acm = 100000/10000 = 10.

Explanation: An ideal op-amp draws zero input current, corresponding to infinite input resistance.

Explanation: An ideal op-amp is modeled with zero output resistance.

Explanation: Av = -Rf/Rin = -50/5 = -10.

Explanation: Av = 1 + Rf/R1 = 1 + 40/10 = 5.

Explanation: A voltage follower has ideal unity gain.

Explanation: Slew rate is the maximum rate of change of output voltage, commonly specified in V per microsecond.

Explanation: Time = delta V/SR = 10/2 = 5 microseconds.

Explanation: For a dominant-pole op-amp, bandwidth ≈ GBW/gain = 2 MHz/20 = 100 kHz.

Explanation: For equal input and feedback resistors, Vo = -(V1+V2+V3) = -(1+2-1) = -2 V.

Explanation: For matched ratios, Vo = 5(V2-V1) = 5(1.2-0.4) = 4 V.

Explanation: For an ideal integrator, dVo/dt = -Vin/(RC). RC = 100000 × 10^-7 = 0.01 s, so slope = -1/0.01 = -100 V/s.

Explanation: Vo = -RC(dVin/dt). RC = 100000×10^-8 = 0.001 s and 2 V/ms = 2000 V/s, so Vo = -2 V.

Explanation: For a sine wave, SR = 2πfVp. Thus fmax = 0.5×10^6/(2π×5) ≈ 15.9 kHz.

Explanation: Output offset due to input offset is approximately the input offset multiplied by noise gain: 2 mV × 100 = 200 mV = 0.2 V.

Explanation: Av = -Rf/Rin = -4. Therefore Vo = (-4)(-0.5 V) = +2 V.

Explanation: Av = 1 + Rf/R1. Thus 11 = 1 + Rf/10 kOhm, giving Rf = 100 kOhm.

Explanation: Vo = -Rf(V1/R1 + V2/R2) = -20k(1/10k + 1/10k) = -4 V.

Explanation: fmax = SR/(2πVp) = 10^6/(2π×10) ≈ 15.9 kHz.

Explanation: A voltage follower directly feeds the output to the inverting input and applies the signal to the non-inverting input, producing approximately unity closed-loop gain.

Explanation: Because V+ exceeds V-, the large open-loop gain drives the output toward the positive saturation rail.

Explanation: Positive feedback creates separate upper and lower switching thresholds, improving noise immunity around the transition level.

Explanation: For a single-pole compensated op-amp, closed-loop bandwidth is approximately GBW divided by noise gain: 1 MHz/100 = 10 kHz.

Explanation: The input-referred offset is amplified by the circuit's noise gain, giving about 2 mV × 50 = 100 mV.

Explanation: Practical input transistors require small DC bias currents. Input bias current is commonly defined as the average magnitude of the two input currents.

Explanation: Input offset current quantifies mismatch between the two input bias currents and is commonly specified as their difference in magnitude.

Explanation: Vp = SR/(2πf) = 0.5×10^6/(2π×10^4) ≈ 7.96 V, so about 8 V.

Explanation: Av=-Rf/Rin=-4, so Vo=-4×0.5=-2 V.

Explanation: The very large open-loop gain with negative feedback forces the two input-node voltages to be nearly equal; this is the virtual-short approximation.

Explanation: Negative feedback holds the inverting node near the grounded non-inverting input voltage, although there is no direct physical ground connection at that node.

Explanation: Vp,max=SR/(2 pi f)=10^6/(2 pi×10^5)≈1.59 V.

Explanation: Output offset due to input offset is approximately noise gain times Vos: 101×1 mV=101 mV.

Explanation: For a non-inverting amplifier, Av=1+Rf/Rg=1+47=48.

Explanation: Vo=Aol(V+-V-)=100000×50 microvolts=5 V.

Explanation: Closed-loop bandwidth is approximately unity-gain frequency divided by noise gain: 10 MHz/20=500 kHz.

Explanation: SRmin=2πfVp=2π×100000×5≈3.14×10^6 V/s=3.14 V/microsecond.

Explanation: The common-mode input range defines allowable common movement of the input terminals while maintaining proper input-stage operation.

Explanation: A real output stage cannot generally drive exactly to or beyond its supply rails, and load current can further restrict available output swing.

Explanation: Rail-to-rail architectures extend input common-mode range and/or output swing close to the supply rails, useful at low supply voltages.

Explanation: High PSRR means variations on the power rails cause relatively little input-referred or output error.

Explanation: For a voltage ratio, 80 dB corresponds to 10^(80/20)=10000.